
LTC2251/LTC2250
11
22510fa
FUNCTIONAL BLOCK DIAGRA
UU
W
Figure 1. Functional Block Diagram
TI I G DIAGRA
U
WW
tAP
N + 1
N + 2
N + 4
N + 3
N + 5
N
ANALOG
INPUT
tH
tD
tL
N – 4
N – 3
N – 2
N – 1
CLK
D0-D9, OF
22510 TD01
N – 5
N
SHIFT REGISTER
AND CORRECTION
DIFF
REF
AMP
REF
BUF
2.2
F
1
F1F
0.1
F
INTERNAL CLOCK SIGNALS
REFH
REFL
CLOCK/DUTY
CYCLE
CONTROL
RANGE
SELECT
1.5V
REFERENCE
FIRST PIPELINED
ADC STAGE
FIFTH PIPELINED
ADC STAGE
SIXTH PIPELINED
ADC STAGE
FOURTH PIPELINED
ADC STAGE
SECOND PIPELINED
ADC STAGE
REFH
REFL
CLK
OE
MODE
OGND
OVDD
22510 F01
INPUT
S/H
SENSE
VCM
AIN
–
AIN
+
2.2
F
THIRD PIPELINED
ADC STAGE
OUTPUT
DRIVERS
CONTROL
LOGIC
SHDN
OF
D9
D0